1. Field of the Invention
The present invention relates to a memory allocation and access method and related device, and more particularly, to a memory allocation and access method and related device that allocate a memory block with a size equal to a maximum possibly accessed data frame at the end of a continuous memory space to ensure that all received data frames can be stored into successive memory blocks.
2. Description of the Prior Art
In a computer system, a CPU (Central Processing Unit) is mainly used for “computing” data rather than “moving” data. Thus, from the perspective of the CPU, it is regarded as a waste of system resources to move data from a memory or other peripheral device through a data bus. In such situation, a DMA (Direct Memory Access) technique is used in the computer system to allow the peripheral device that needs high-speed data transfer with the memory, such as a graphics card, a network card, or a sound card, to move data directly from or into the memory without participation of the CPU. So, the CPU can be re-scheduled to handle other tasks, thereby enhancing system performance.
Please refer to FIG. 1. FIG. 1 is a schematic diagram of a conventional DMA device 10. The DMA device 10 includes a memory 110, a data bus 120 and a DMA controller (DMAC) 1 30. The memory 110 includes a first storage unit 112 and a second storage unit 114. The first storage unit 112 is utilized for storing data, and has a memory space that the computer system allocates to the DMA device 10. The memory space further includes memory blocks BLK_0-BLK_n. The second storage unit 114 is utilized for storing a descriptor table. The descriptor table includes descriptors DESC_0-DESC_n, of which each is utilized for recording a memory address and use status of a corresponding memory block to be a pointer of the corresponding memory block. The data bus 120 is coupled to the memory 110, the DMAC 130, a CPU 140 and a data source device 150, and is utilized for transferring control signals of the DMAC 130 and data being written into or read from the memory 110. The DMAC 130 is utilized for sending out a request signal REQ to the CPU 140 to request control of the data bus 120, and storing data of the data source device 150 into the memory blocks of the memory 110 according to memory allocation of the memory 110, i.e. a mapping relation between the descriptors and the memory blocks. Thus, when the data source device 150 is about to store data into the memory 110, the request signal REQ is firstly sent out to the CPU 140 to acquire the control of the data bus 120 by the DMAC 130. Then, the data can be stored into corresponding memory blocks by the DMAC 130 according to the memory allocation of the memory 110, and the use status of the memory 110 is recorded into the descriptor table as well.
However, for a limited-memory-size computer system, such as an embedded system, the memory that the system can provide for the DMAC 130 is limited. So in the memory 110, the size of the memory block assigned to each descriptor is generally smaller than that of a possibly received data frame, such that the received data frame is dispersed throughout multiple memory blocks. In this case, when the data source device 150 is about to store a data frame into the memory 110, the DMAC 130 then stores the data frame successively into memory blocks corresponding to a first unused descriptor and thereafter in the descriptor table according to the size of the data frame and use status of the descriptors DESC_0-DESC_n. For example, please refer to FIG. 2. FIG. 2 is a schematic diagram of a memory allocation of the memory 110 in FIG. 1. When a data frame FRAME_1 transmitted by the data source device 150 has a size that lies between two memory blocks and three memory blocks, and all of the descriptors DESC_0-DESC_n in the memory 110 are not used yet, the DMAC 130 stores the data frame FRAME_1 successively into the memory blocks BLK_0-BLK_2 corresponding to the descriptors DESC_0-DESC_2, and when a next data frame FRAME_2 is received, the DMAC 130 then stores the data frame FRAME_2 into corresponding memory blocks starting from the descriptor DESC_3. With such memory allocation, each data frame is dispersed throughout multiple memory blocks of the memory 110. Thus, when applications need a frame data stored in the memory 110, the CPU 140 has to collect data dispersed in the memory blocks according to relevant descriptors of the data frame and copy to a continuous memory space, so as to provide for the applications. Consequently, the CPU 140 still wastes computing resources on simple copy operations, causing inefficiency of the system performance.
In order to reduce the copy operations of the CPU 140 for enhancing system efficiency, another memory allocation manner is further provided in the prior art. Please refer to FIG. 3. FIG. 3 is a schematic diagram of another memory allocation of the memory 110 in FIG. 1. In FIG. 3, memory blocks BLK_0-BLK_n are successively mapped to descriptors DESC_0-DESC_n in like manner, and the difference with FIG. 2 is that the memory blocks BLK_0-BLK_n form a continuous memory space. In this case, a data frame can be stored into memory blocks with continuous memory space, and thus when the data frame is demanded by the applications, the continuous memory space occupied by the data frame can be directly provided to the applications by the CPU 140 according to relevant descriptors of the data frame, so that the data frame can be retrieved by the applications. Consequently, the CPU 140 no longer needs to perform the copy operations, and the system efficiency can be effectively enhanced. However, with this memory allocation manner, a received data frame may also be dispersed throughout inconsecutive memory blocks. For example, when the size of a data frame FRAME_3 lastly received by the DMAC 130 is greater than a total size of all unoccupied memory blocks in the memory 110, the data frame FRAME_3 is separately stored into inconsecutive memory blocks BLK_(n−1)-BLK_n and BLK_0-BLK_1, as shown in FIG. 3. At this time, the CPU 140 still has to copy the data frame FRAME_3 to a continuous memory space for the applications.
Certainly, the computer system can also allocate the size of a possibly received maximum data frame for each memory block in order to avoid the copy operations of the CPU completely. However, it is hard to implement in a limited-memory-size system, such as an embedded system, and thus more efficient design for allocating and using the memory is still needed.